Design-Reuse11 天
Cortex-m0 IP Listing
compatible to ARMv6-M Instruction Set Architecture (Cortex-M0) ; single clock, static design ; single AMBA V2.0 AHB bus interface ; 56 Thumb-2 instructions ; 12,500 gates ; 0.04mm² @ 90nm ...
Design-Reuse11 天
ARM Cortex-M0 IP Listing
compatible to ARMv6-M Instruction Set Architecture (Cortex-M0) ; single clock, static design ; single AMBA V2.0 AHB bus interface ; 56 Thumb-2 instructions ; 12,500 gates ; 0.04mm² @ 90nm ...